High voltage generator having output current control

ABSTRACT

High voltage generator including several voltage multiplying stages connected in series, each having a diode and a capacitor one terminal of which being connected to the cathode of the respective diode, every cathode of a diode being connected to the anode of the diode of the next voltage multiplying stage, a clock generator generating two clock pulses being 180° out of phase to one another and being supplied alternately to the other terminal of the capacitors of successive voltage multiplying stages, the last diode in the series supplying a high voltage output and the high voltage output being connected to feed-back circuit, modifying the two clock pulses in dependence on the voltage level on the high voltage output, at least the capacitor (Cn) in the last voltage multiplying stage receiving a control current (I1) determined by the feed-back circuit instead of one of both clock pulses.

BACKGROUND OF THE INVENTION

The invention relates to a high voltage generator comprising a firstseries of voltage multiplying stages, each stage comprising a diode anda capacitor one terminal of which being connected to the cathode of therespective diode, wherein every cathode of a diode is connected to theanode of the diode of the next voltage multiplying stage, a clockgenerator which is able to generate clock pulses being 180° out of phasewith one another and being supplied alternately to the other terminal ofthe capacitors of successive voltage multiplying stages, the last diodein the series having a high voltage output and said high voltage outputbeing connected to feed-back means, which modifies said two clock pulsesin dependence on the voltage on the high voltage output.

DESCRIPTION OF THE PRIOR ART

Such a high voltage generator is known from the European patentapplication 0,350,462. Said known high voltage generator generates ahigh voltage pulse for instance to program (E)EPROM-memory cells.Therefore, a voltage of about 5 V is converted in a pulse of about 16 V,which value is sufficient to program (E)EPROM-memory cells. Everyvoltage multiplying stage functions as a charge pump and after eachstage a voltage increase at most equal to the step value of the clockpulse less the threshold voltage of the diodes occurs.

A disadvantage of said known arrangement is that the high voltage outputshows spikes whenever one of both clock pulses switches.

Japanese patent application JP-A-56.094962 discloses a transformerlesstype DC/DC converter which is controlled by two reverse-phased clockpulses φ₁ and φ₂. The output voltage of the output terminal is entirelydetermined by PWM-control of the two reverse-phased clock pulses.

U.S. Pat. No. 5,036,229 discloses an arrangement comprising multiplemultiplier stages in a charge pump, which multiplier stages arecontrolled by clock pulses. The application of several charge pumps inparallel are described.

SUMMARY OF THE INVENTION

The object of the invention is to provide an arrangement neutralizingthe disadvantage related to the prior art and the output voltage ofwhich does not show any spikes any more.

The arrangement according to the invention is therefore characterized inthat at least the last capacitor of the multiplying stages is connectedto a junction in order to be supplied with a control voltage duringoperation, said junction being connected to an input of a controlcircuit having two outputs, said junction also being connected tocurrent charging means, which is controlled by one of said two outputsof the control circuit and by the feed-back means, and to currentdischarge means controlled by the other of said two outputs of thecontrol circuit, in such a way that when, during operation, the controlvoltage increases to a first predetermined level the control circuitoperates to deactivate said current charging means and to activate saidcurrent discharge means, and when the control voltage decreases to asecond predetermined level the control circuit operates to deactivatesaid current discharge means and to activate said current chargingmeans.

By shaping the current supplied by the current charge means and thecurrent lead away by the current discharge means in a proper way thespikes on the high voltage output may be substantially reduced.

In a first embodiment of the invention only said capacitor in said lastvoltage multiplying stage is connected to said junction to receive saidcontrol voltage.

In a preferred embodiment of the invention the high voltage generator ischaracterized in that said feed-back means comprises a high voltagefeed-back circuit connected to the high voltage output, in that theoutput of the high voltage feed-back circuit is connected to the inputof an operational amplifier the other input of which is connected to areference voltage, in that the current charge means comprises a currentsource controlled by an output of the operational amplifier, and a firstswitch which is connected in series with said current source and iscontrolled by said one of said two outputs of the control circuit, inthat the current discharge means comprises a second switch beingcontrolled by said other of said two outputs of the control circuit, andin that the control circuit is said clock generator which is able togenerate clock pulses being 180° out of phase with one another at itsoutputs.

By the application of the latter measures the frequency of the clockpulses is determined by the load. Therefore, in the preferred embodimentthe voltage multiplier only pumps charge to its output when it is neededthere.

When, during operation, the control voltage exceeds the firstpredetermined level, said clock pulses switch in such a way that saidfirst switch controlled by clock pulse is opened and said second switchcontrolled by clock pulse is closed and when the input voltage decreasesbelow the second predetermined level said clock pulses switch againresulting in closing the first switch and opening of said second switch.

Preferably, a second identical high voltage generator is provided, thesecond identical high voltage generator having voltage multiplyingstages being alternately supplied with the clock pulses, however, in areverse order relative to the order of the high voltage generator, thehigh voltage outputs of both high voltage generators being connected toone another in such a way, that when one of both high voltage generatorsdoes not supply any control current but charges its respective lastcapacitor the other high voltage generator supplies said controlcurrent.

In such a preferred embodiment, said feed-back means may comprise a highvoltage feed-back circuit connected to the high voltage output, in thatthe output of the high voltage feed-back circuit is connected to theinput of an operational amplifier the other input of which is connectedto a reference voltage, in that the current charge means comprises acurrent source controlled by an output of the operational amplifier, anda first switch which is connected in series with said current source andis controlled by said one of said two outputs of the control circuit, inthat the current discharge means comprises a second switch beingcontrolled by said other of said two outputs of the control circuit, inthat the control circuit is said clock generator which is able togenerate clock pulses being 180° out of phase with one another at itsoutputs, in that a second series of voltage multiplying stages parallelto the first series of multiplying stages is provided, the second seriesbeing identical to the first series, in that the last stage of thesecond series of multiplying stages is connected to a junction of aseries connection of two further switches parallel to the first andsecond switches and to a further input of the clock generator, thefurther switches being also controlled by said clock pulses, however, ina reverse order.

BRIEF DESCRIPTION OF THE DRAWINGS

The invention will be hereinafter explained by reference to somedrawings. In the drawings

FIG. 1 shows the circuit according to the invention, partly in blockdiagram;

FIG. 1A shows an alternative circuit according to the invention;

FIG. 2 shows the voltage being supplied to the last capacitor instead ofone of both clock pulses;

FIG. 3 shows a simulated diagram of the two clock pulses controlling thecharge pumps;

FIG. 4 shows a simulated diagram of a part of the rising edge of aprogramming pulse without current control of the last capacitor;

FIG. 5 shows a simulated diagram of a part of the rising edge of aprogramming pulse with current control of the last capacitor;

FIG. 6 shows a simulated diagram of a programming pulse generated bymeans of the arrangement according to the invention.

DETAILED DESCRIPTION OF THE EMBODIMENTS

FIG. 1 shows the invention partly in block diagram. The figure shows avoltage multiplier known as such comprising several charge pumpsconnected in series. Every charge pump consists of a diode Di and acapacitor Ci+1 connected to its cathode. At its other terminal eachcapacitor receives a clock pulse (φ1 or φ2) generated by an oscillator3. The oscillator 3 generates two clock pulses being 180° out of phasewith respect to one another, said clock pulses being suppliedalternately to the successive capacitors Ci. In this voltage multiplierknown as such every stage substantially doubles its input voltage. Thediodes D0 . . . Dn may be MOS-transistors connected as diodes.

In the arrangement according to the invention the last capacitor Cn isnot controlled by one of both clock pulses φ1 or φ2, but by a controlcurrent I1. This provides the possibility to reduce spikes on the highvoltage output during switching of the clock pulses φ1 and φ2.

The current control of the last capacitor is provided by means offeed-back means comprising a high voltage feed-back circuit 1, areference source 2, an operational amplifier A, a current source I1 andtwo switches S1 and S2 controlled by the clock pulses φ1 and φ2. Theoutput of the high voltage feed-back circuit 1 is connected to theinverting input of the operational amplifier A, the non-inverting inputof which receives a reference voltage (or reference current) from areference voltage or reference current source 2. The output of theoperational amplifier A controls the output current of the currentsource I1. The output of the current source I1 is connected to ground(VSS) through two switches S1 and S2 being connected in series and beingcontrolled by φ1 and φ2, respectively. The junction of the switches S1and S2 provides the voltage Vn to the last capacitor Cn, as well as theinput voltage of the oscillator 3.

FIG. 2 shows the voltage Vn to the last capacitor Cn as a function oftime. If Vn increases Cn is discharged through Dn and a load connectedto the high voltage output HV_(out). Then, the switch S2 controlled byφ2 is closed, while the switch S1 controlled by φ1 is opened. Switch S2supplies the current I1 to the capacitor Cn, in such a way that theoutput current I_(out) is also equal to I1. At a certain moment t1 Vnexceeds a predetermined threshold value and the oscillator 3 switches:the outputs φ1 and φ2 change sign. The switches S1 and S2 controlled byφ1 and φ2, respectively, switch, i.e. S2 opens and S1 closes. Thevoltage Vn decreases to ground potential (VSS) the rate of which beingdetermined by the resistance of S1, after which the capacitor Cn ischarged through diode Dn-1. At moment t2 oscillator 3 switches again,after which Vn increases again and Cn discharges again by the currentI_(out) =I1 through Dn and the load.

If I1 is a controlled current also the output current I_(out) is acontrolled current. The voltage Vn has a saw-tooth shape. The slope ofthe rising edge is determined by I1 being in turn controlled by the highvoltage feed-back circuit 1. Since the high voltage feedback circuit 1is controlled by the high voltage output HV_(out) the slope of Vn isdetermined by the load connected to the high voltage output.Furthermore, because Vn also controls the oscillator the frequency ofthe clock pulses φ1 and φ2 is determined by the load. The voltagemultiplier, therefore, only pumps charge to the output HV_(out) when itis needed there. So, the voltage multiplier according to the inventiondoes not only have the advantage of having an output being currentcontrolled and having reduced spikes on the output voltage, but alsoshows frequency control of the oscillator.

In FIG. 1 a single multiplying circuit is shown. A disadvantage of sucha single circuit is that no output current I_(out) can flow during thefalling edge of control signal Vn. In practice this problem is solved byapplying an additional, identical voltage multiplier, in which thevoltages φ1 and φ2 have inverted values compared to those in thearrangement of FIG. 1. At the moments that Vn in the arrangementaccording to FIG. 1 decreases and, therefore, no output current issupplied, the other identical voltage multiplier in such a double-phasearrangement will supply an output current I1, so that always: I_(out)=I1. Such a double-phase circuit is shown in FIG. 1A.

FIG. 3 shows a simulation of a double-phase embodiment of thearrangement according to FIG. 1. Here, Vn1 is equivalent to Vn in FIG. 1for one phase and Vn2 for the other phase. The frequencies of φ1 and φ2correspond to those of Vn1 and Vn2, respectively. In FIG. 3 one can seehow this frequency is determined by the load. On top of FIG. 3 a part ofthe simulated curve of the rising edge of a programming pulse VPP may beseen. VPPID shows the ideal, desired curve of VPP. The two other curvesshow the control signals Vn1 and Vn2. After 60 μs a heavier load isconnected to the output HV_(out). One can clearly observe the slopes ofVn1 and Vn2 becoming more steep and, therefore, the frequency increases.The voltage jump at the beginning of every pulse is caused by the chargepump diode threshold voltage to be exceeded. The spikes in the controlsignals only reach the capacitors being controlled by them, however,they do not reach the output of the charge pump as long as the circuitis properly dimensioned.

FIGS. 4, 5 and 6 show resulting programming pulses VPP as a function oftime. FIG. 4 shows VPP in case the last capacitor Cn is not currentcontrolled, but like the other capacitors receives one of both clockpulses φ1 or φ2. FIG. 4 only shows a part of the rising edge of theprogramming pulse. VPP is the output signal of the charge pump, whileVPPOUT is the output signal of a (small) low pass filter receiving VPPas input signal. FIG. 5 shows that in the arrangement according to theinvention, applying current control of the last capacitor Cn, spikescaused by the clock pulses are less powerful in the programming pulseVPP. When comparing FIGS. 4 and 5 it has to be observed that FIG. 5 hasbeen simulated utilizing a capacitor (CHV) between HV_(out) and ground(VSS) having a magnitude of more than six times smaller than the one inFIG. 4. If FIG. 4 would have been simulated utilizing the same capacitoras used in the simulation of FIG. 5 the spikes on the VPP-signal in FIG.4 would have been about six times larger. FIG. 6 shows an entireprogramming pulse as may be realized with the arrangement according tothe invention. One can clearly see how exactly the real pulse VPPOUTprecisely follows the ideal pulse VPPID.

The invention is not limited to the current control of the lastcapacitor Cn. Principally, it is possible to control the current ofother capacitors. However, generally this results in a lower efficiencyof the charge pump. Moreover, then the output current no longer equalsI1 and, therefore, this current is defined less well.

I claim:
 1. High voltage generator comprising a first series of voltagemultiplying stages, each stage comprising a diode (D0 . . . Dn) and acapacitor (C1 . . . Cn) one terminal of which being connected to thecathode of the respective diode, wherein every cathode of a diode isconnected to the anode of the diode of the next voltage multiplyingstage, a clock generator (3) which is able to generate clock pulses (φ1,φ2) being 180° out of phase with one another and being suppliedalternately to the other terminal of the capacitors of successivevoltage multiplying stages, the last diode in the series having a highvoltage output and said high voltage output being connected to feed-backmeans, which modifies said two clock pulses in dependence on the voltage(HVout) on the high voltage output, characterized in that at least thelast capacitor (Cn) of the multiplying stages is connected to a junctionin order to be supplied with a control voltage (Vn) during operation,said junction being connected to an input of a control circuit (3)having two outputs, said junction also being connected to currentcharging means (I1, S2), which is controlled by one of said two outputsof the control circuit (3) and by the feed-back means (1, 2, A), and tocurrent discharge means (S1) controlled by the other of said two outputsof the control circuit (3), in such a way that when, during operation,the control voltage (Vn) increases to a first predetermined level thecontrol circuit (3) operates to deactivate said current charging means(I1, S2) and to activate said current discharge means (S1), and when thecontrol voltage (Vn) decreases to a second predetermined level thecontrol circuit (3) operates to deactivate said current discharge means(S1) and to activate said current charging means (I1, S2).
 2. Highvoltage generator according to claim 1, characterized in that only saidcapacitor (Cn) in said last voltage multiplying stage is connected tosaid junction to receive said control voltage (Vn).
 3. High voltagegenerator according to claim 1, characterized in that said feed-backmeans comprises a high voltage feed-back circuit (1) connected to thehigh voltage output (HV_(out)), in that the output of the high voltagefeed-back circuit (1) is connected to the input of an operationalamplifier (A) the other input of which is connected to a referencevoltage, in that the current charge means comprises a current source(I1) controlled by an output of the operational amplifier (A), and afirst switch (S2) which is connected in series with said current source(I1) and is controlled by said one of said two outputs of the controlcircuit (3), in that the current discharge means comprises a secondswitch (S1) being controlled by said other of said two outputs of thecontrol circuit (3), and in that the control circuit (3) is said clockgenerator which is able to generate clock pulses being 180° out of phasewith one another at its outputs.
 4. High voltage generator according toclaim 3, characterized in that when, during operation, the controlvoltage (Vn) exceeds the first predetermined level, said clock pulses(φ1, φ2) switch in such a way that said first switch (S2) controlled byclock pulse (φ2) is opened and said second switch (S1) controlled byclock pulse (φ1) is closed and when the input voltage decreases belowthe second predetermined level said clock pulses switch again resultingin closing the first switch (S2) and opening of said second switch (S1).5. High voltage generator according to claim 1, characterized in that asecond identical high voltage generator is provided, the secondidentical high voltage generator having voltage multiplying stages beingalternately supplied with the clock pulses (φ1, φ2), however, in areverse order relative to the order of the high voltage generator, thehigh voltage outputs of both high voltage generators being connected toone another in such a way, that when one of both high voltage generatorsdoes not supply any control current (I1) but charges its respective lastcapacitor the other high voltage generator supplies said control current(I1).
 6. High voltage generator according to claim 5 characterized inthat said feed-back means comprises a high voltage feed-back circuit (1)connected to the high voltage output (HV_(out)), in that the output ofthe high voltage feed-back circuit (1) is connected to the input of anoperational amplifier (A) the other input of which is connected to areference voltage, in that the current charge means comprises a currentsource (I1) controlled by an output of the operational amplifier (A),and a first switch (S2) which is connected in series with said currentsource (I1) and is controlled by said one of said two outputs of thecontrol circuit (3), in that the current discharge means comprises asecond switch (S1) being controlled by said other of said two outputs ofthe control circuit (3), in that the control circuit (3) is said clockgenerator which is able to generate clock pulses being 180° out of phasewith one another at its outputs, in that a second series of voltagemultiplying stages parallel to the first series of multiplying stages isprovided, the second series being identical to the first series, in thatthe last stage of the second series of multiplying stages is connectedto a junction of a series connection of two further switches parallel tothe first (S2) and second (S1) switches and to a further input of theclock generator (3), the further switches being also controlled by saidclock pulses (φ1, φ2), however, in a reverse order.